I've been building a tool that generates synthetic RF signals with labels, mainly for training signal classifiers and testing DSP code: https://sigtera.com

You specify the signals and parameters, and it outputs IQ or spectrograms along with a JSON file per signal listing the parameters used to make it. It covers the usual modulations (PSK, QAM, FSK, OFDM, DSSS, etc.) and a fair number of real protocols like AIS, ADS-B, LoRa, Wi-Fi, BLE and GSM.

I set up two example configs that load straight into the form:

• A small PSK dataset with 100 BPSK/QPSK/8PSK samples at random SNR, symbol rate and roll-off: https://sigtera.com/scenes/psk_classification
• A recreation of the last few seconds of US Airways 1549 on the Hudson, using the NTSB report. It has the plane's Mode S transmissions and the ferries' AIS as heard from a nearby pier: https://sigtera.com/scenes/miracle_on_the_hudson

You can use it without an account, up to 100 MB per request. It's still early, so I'd appreciate any feedback, especially if something doesn't look right from a signals point of view.

I came across Paper VIII (Dual-Layer Topological Neuromorphic Architecture) and tested one of its ideas: replacing repeated trigonometric calculations with integer phase addition and precomputed lookup tables (LUTs).

1. How does it work? (First animation above)

The first animation shows how phase calculations can be represented using modular integer arithmetic.

For example, with 1,024 phase positions:

• Angles are converted into integers from 0 to 1023.
• Adding 1023 + 1 wraps back to 0.
• The resulting index retrieves a precomputed value from a lookup table.

This allows certain complex wave calculations to be approximated using integer addition and memory lookups instead of repeated trigonometric evaluations.

2. CPU benchmark — How much faster?

I tested 10 million unit-magnitude complex wave calculations on a CPU.

Results:

• Conventional calculation: 330.40 ms
• Optimized angle calculation: 195.61 ms
• Phase-Ring Z1024: 36.95 ms
• Phase-Ring Z2048: 33.26 ms

The fastest LUT approach was approximately 9.9× faster than the conventional baseline and 5.9× faster than the optimized baseline in this test.

However, this comes with trade-offs. Quantizing phases introduces approximation errors, and larger lookup tables require more memory.

These results apply to a specific type of wave computation, not general-purpose multiplication or physical PIM hardware.

Original Paper VIII (Zenodo):
https://doi.org/10.5281/zenodo.22782241

Implementation, benchmarks, and visualizations (GitHub):
https://github.com/heejun1105/phase-ring-plp-benchmark

I’m using a bladeRF 2.0 micro A9 and recently I’ve been facing random FPGA loading issues.Sometimes the FPGA loads perfectly fine, but other times I get these errors:
dev->backend->load_fpga failed: File or device I/O failure
Failed to switch to NULL interface
The strange thing is that I’ve successfully loaded FPGA images multiple times using the same laptop and USB cable before. I’m using Windows 11. Could this be due to insufficient USB power from my laptop, or is there something else I should check?
I’m also considering programming through JTAG to see if that helps. Has anyone faced a similar issue?